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24AA32AF/24LC32AF
5.0
DEVICE ADDRESSING
an Acknowledge signal on the SDA line. Depending on
the state of the R/W bit, the 24XX32AF will select a
A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
read or write operation.
The control byte consists of a four-bit control code. For
the 24XX32AF, this is set as ‘ 1010 ’ binary for read and
write operations. The next three bits of the control byte
are the Chip Select bits (A2, A1, A0). The Chip Select
FIGURE 5-1:
CONTROL BYTE FORMAT
Read/Write Bit
bits allow the use of up to eight 24XX32AF devices on
the same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
Control Code
Chip Select
Bits
correspond to the logic levels on the corresponding A2,
S
1
0
1
0
A2 A1 A0 R/W ACK
A1 and A0 pins for the device to respond. These bits
are in effect the three Most Significant bits of the word
address.
Slave Address
For the SOT-23 package, the address pins are not
available. During device addressing, the A1, A2, and
A0 Chip Select bits (Figure 5-2) should be set to ‘ 0 ’.
Start Bit
Acknowledge Bit
The last bit of the control byte defines the operation to
5.1
Contiguous Addressing Across
be performed. When set to a ‘ 1 ’, a read operation is
selected. When set to a zero, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 5-2). Because
only A11 to A0 are used, the upper four address bits are
“don’t care” bits. The upper address bits are transferred
first, followed by the Less Significant bits.
Following the Start condition, the 24XX32AF monitors
the SDA bus checking the device type identifier being
transmitted and, upon receiving a ‘ 1010 ’ code and
appropriate device select bits, the slave device outputs
Multiple Devices
The Chip Select bits A2, A1 and A0 can be used to
expand the contiguous address space for up to 256K
bits by adding up to eight 24XX32AF devices on the
same bus. In this case, software can use A0 of the con-
trol byte as address bit A12; A1 as address bit A13; and
A2 as address bit A14. It is not possible to sequentially
read across device boundaries.
The SOT-23 package does not support multiple device
addressing on the same bus.
FIGURE 5-2:
ADDRESS SEQUENCE BIT ASSIGNMENTS
Control Byte
Address High Byte
Address Low Byte
0 R/W
1
0
1
0
A
2
A
1
A
x
x
x
x
A A
11 10
A
9
A
8
A
7
?
?
?
?
?
?
A
0
Control
Code
Chip
Select
Bits
x = “don’t care” bit
? 2009 Microchip Technology Inc.
DS22184A-page 7
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